1. Field of the Invention
The present invention relates to a substrate for electronic assemblies.
2. Background Information
Integrated circuits are typically assembled into a package that is soldered to a printed circuit board. The integrated circuit may be mounted to a substrate which has a plurality of contacts such as solder balls or pins that are soldered to the printed circuit board. The contacts are typically located on a bottom surface of the substrate. The integrated circuit is typically located on a top surface of the substrate. The package substrate may contain routing traces, power/ground planes and vias that electrically connect the integrated circuit with the contacts located on the other side of the substrate. The substrate may have multiple layers of routing traces and vias to interconnect the integrated circuit and the contacts.
FIGS. 1a-e show a process for forming a substrate of the prior art with interconnect vias. A first conductive layer 1 such as copper may be attached to a first dielectric layer 2. The dielectric layer 2 may have a via opening 3 formed therein. A permanent resist mask 4 may be patterned onto the dielectric layer 2 as shown in FIG. 1b. As shown in FIG. 1c, copper 5 may then be plated onto the areas of the dielectric 2 which are not covered by the resist 4.
As shown in FIG. 1d, a subsequent layer of interplating 6 may be applied to the top of the plated copper material 5. The interplating 6 may be a nickel-copper composition which improves adhesion to subsequent layers in the substrate. A second dielectric layer 7 may then be patterned onto the substrate as shown in FIG. 1e.
The substrate may be subjected to variations in temperature. The changes in temperature may create stresses within the substrate. It has been found that temperature cycling may cause delamination between the permanent solder resist 3 and the sidewalls 8 of the plated copper 5 due to poor adhesion between the permanent solder resist and sidewall of the plated copper. The delamination may create crack initiation sites. Cracks may propagate through the substrate and cause electrical shorts or opens in the package. It would be desirable to provide a process which strengthens the adhesion between the second dielectric layer and the copper sidewalls of a substrate.